Computer systems are comprised of a variety of different components or "devices" that operate together to form the resultant system. Typically, some of the devices are supplied with the computer system initially, such as the central processing unit, and some devices can be installed into the computer system after the initial configuration of the system. The devices of the computer system are generally coupled together via interconnects (or busses) which may be of several types. Common interconnects include SCSI, ADB and serial connections such as that described by IEEE Standards Document 1394, entitled Standard For A High Performance Serial Bus (hereinafter the "IEEE 1394 Serial Bus Standard").
In general, a computer interconnect is comprised of a multiplicity of nodes that are interconnected via point-to-point links, such as cables. The nodes themselves are uniquely addressable entities which can be independently reset and identified. Nodes are associated with respective components of the computer system and serve as interfaces between the components and the communications links.
The variety of computer interconnects has led to the development of a common scalable bus-technology-independent Control and Status Register (CSR) Architecture which attempts to minimize the software and firmware changes necessary when migrating a processor from one system bus to another or when bridging from one bus to another. This common CSR Architecture is described in IEEE Standards Document 1212, 1994 edition, entitled Information Technology--Microprocessor Systems--Control and Status Registers (CSR) Architecture for Microcomputer Buses (hereinafter the "CSR Architecture").
The CSR Architecture describes a hierarchical configuration ROM directory structure. FIG. 1 illustrates the general ROM format for a configuration ROM 10 according to the CSR Architecture. In general, node configuration ROMs 10 reside within the address space of the computer interconnect. As shown, the configuration ROM 10 is divided into a root directory 12, various root dependent directories 14, root leafs 16, unit directories 18, unit dependent directories 20, and unit leafs 22. Thus, the directories are arranged in a hierarchical fashion. Within this structure, directories may have "children", "parents" and "siblings".
Entries within the root directory 12 may provide information or may provide a pointer to another directory (e.g., a root dependent directory 14) which has the same structure as the root directory, or to a root leaf 16 which contains information. The unit directories 18 contain information about each unit, such as its software version number and its location within the node's address space.
All directories in the node configuration ROMs 10 have the format shown in FIG. 2. The directory length parameter specifies the number of following quadlet entries in the directory. Each directory entry then has the format shown in FIG. 3. Each directory entry is broken down into a key field and an entry value field. The key field itself has two fields: the key type, indicating the type of directory entry, and the key value, specifying the particular directory entry, e.g., spec.sub.-- ID, unit software version, etc. The key type definitions for an embodiment according to the IEEE 1394 Serial Bus Standard are shown in Table 1, below.
TABLE 1 ______________________________________ Reference Name Key Type Meaning of Least Significant 24-bits ______________________________________ Immediate 0 Immediate Value Offset 1 Initial Register Space Offset for an Immediate Value Leaf 2 Indirect Space Offset for a Leaf Directory 3 Indirect Space Offset for a Directory ______________________________________
For an immediate entry, the entry value is the 24-bit value for that directory entry. Its meaning is dependent on the type of entry. For an offset entry, the entry value contains a 24-bit offset field. The offset value specifies a CSR address as a quadlet offset from the base address of the initial register space. For the leaf and directory entries, the entry value provides a 24-bit indirect offset value which specifies the address of the leaf or directory of the indirect space. The indirect offset value indirectly specifies the ROM offset address of the leaf or the directory. Thus, using the key type and key value, a specific entry in the configuration ROM 10 of a node on the serial bus can be identified.
The CSR Architecture provides for only 64 key values in directory and leaf entries within a ROM 10. Many of these 64 values have already been defined by various industry-wide specifications, such as the IEEE 1394 Serial Bus Standard, for particular computer interconnects. As a result, the available key space has been virtually exhausted.